The present application relates to semiconductor technology; more particularly, to a method of forming a semiconductor structure comprising fins grown from a surface of a semiconductor substrate, the fins thus obtained being without residual fin defects.
For more than three decades, the continued miniaturization of metal oxide semiconductor field effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Various showstoppers to continued scaling have been predicated for decades, but a history of innovation has sustained Moore's Law in spite of many challenges. However, there are growing signs today that metal oxide semiconductor transistors are beginning to reach their traditional scaling limits. Since it has become increasingly difficult to improve MOSFETs and therefore complementary metal oxide semiconductor (CMOS) performance through continued scaling, further methods for improving performance in addition to scaling have become critical.
The use of non-planar semiconductor devices such as, for example, semiconductor fin field effect transistors (FinFETs), is the next step in the evolution of complementary metal oxide semiconductor (CMOS) devices. Semiconductor fin field effect transistors (FinFETs) can achieve higher drive currents with increasingly smaller dimensions as compared to conventional planar FETs.
Current FinFET technology requires removal of fins from the region where they are not desired so that fins are formed only in the regions where they are needed. Removing undesired fins requires applying a fin cut mask. However, there is inherent variation when placing the mask on the wafer. For closely packed fins, it becomes extremely challenging, if not impossible, to precisely place the mask relative to fin patterns. An excessive misalignment of the cut mask to the fins results in either an incomplete removal of undesired fins or a partial removal of device fins. Either case results in a yield issue.
There is thus a need for a method to form fins in FinFET devices without the above yield issue.